30 Jan 2021
Webinar on “Design of counters and logic gates” by Department of Electronics and Communication Engineering and IETE-ISF VBIT
ABOUT EVENT
Department of Electronics and Communication Engineering and IETE-ISF VBIT organised a webinar on “Design of counters and logic gates” on January 30th, 2021. The event was addressed by Dr. V. Rama, Assistant Professor (Grade-I), Department of ECE, NIT Warangal through zoom platform.
