19 Jun 2024
Day 2 of our 5-Day Hands-on Faculty Development Program on VLSI SoC Design & Verification with RISC-V
ABOUT EVENT
🔧📚 Day 2 of our 5-Day Hands-on Faculty Development Program on VLSI SoC Design & Verification with RISC-V!
Organized by the Department of ECE in association with TASK and Maven Silicon.
Resource Person: PUTTA SATISH, Principal Engineer, Maven Silicon
🗓️ Date: 19th June 2024
Continuing our journey into VLSI SoC Design & Verification, participants are gaining valuable insights and hands-on experience under the expert guidance of Mr. Putta Satish.
