20 Jun 2024
Day-3 of the 5-Day Hands-on Faculty Development Program on VLSI SoC Design & Verification with RISC-V
ABOUT EVENT
📚 Day-3 of the 5-Day Hands-on Faculty Development Program on VLSI SoC Design & Verification with RISC-V was a success!
🗓️ Date: 20th June 2024
🏛️ Organized by: Department of ECE in association with TASK and Maven Silicon
👨🏫 Resource Person: Putta Satish, Principal Engineer, Maven Silicon
Our faculty gained valuable insights and practical skills in VLSI SoC Design and Verification with RISC-V. A step forward in advancing our academic and professional expertise!
